PCB Stackup Generator

SEC 01

Choose your board parameters and the generator assembles a foil-construction stackup from standard cores and prepreg glass styles — the same material set most fabricators stock. Output includes finished thickness, layer assignments and controlled-impedance starting points.

Layer count12 L

Finished board thickness

Copper weight — outer / inner

Laminate material

Quick presets

Builds use common fabricator material sets. Always confirm the final stackup with your fab before tooling.

DWG NOSTK-12L-160

REVA

MaterialFR-4

Copper O/I1 / 0.5 oz

Finished—

Tolerance±10%

SEC 02

PCB Stackup Library — 4 to 24 Layers

Eleven reference stackups covering the layer counts fabricators build every day. Each card shows the recommended layer arrangement — click any of them to load it into the generator and tune thickness, copper and material.

Every template above loads straight into the generator — tune thickness, copper and material, then hand the drawing to your fabricator. Moving a high layer count design into production? The Multilayer PCB guide from PCBSync covers fabrication capabilities, tolerances and the cost drivers behind each added layer pair.

SEC 03

Flex & Rigid-Flex PCB Stackups

Flex circuits replace FR-4 with polyimide film, rolled-annealed copper and coverlay. Rigid-flex laminates conventional FR-4 sections on top of continuous flex layers, so one board folds into the enclosure. Constructions below follow IPC-2223 design guidance.

Single-layer flex

Simplest and most bendable construction — jumpers, camera modules, antennas.

Coverlay · PI 12.5 µm + adhesive 12.5 µm

Acrylic adhesive · 13 µm

Copper RA 1 oz · 35 µm

Polyimide base film · 25 µm

Optional stiffener (FR-4 / PI / steel) — local, at connectors

TOTAL ≈ 0.10–0.13 MMBEND: STATIC ≥ 6×T

Double-layer flex

Adhesiveless copper-clad core for tighter bends and plated through-vias between sides.

Coverlay · 25 µm

Copper RA 1 oz · 35 µm (L1)

Adhesiveless polyimide core · 25–50 µm

Copper RA 1 oz · 35 µm (L2)

Coverlay · 25 µm

TOTAL ≈ 0.15–0.20 MMBEND: STATIC ≥ 10×T

Multilayer flex (4 L)

Bondply joins two double-sided flex cores. Keep layer count low in the bend region.

Coverlay · 25 µm

Copper 1 oz (L1)

Polyimide core · 25 µm

Copper 1 oz (L2)

Bondply · adhesive 25 µm

Copper 1 oz (L3)

Polyimide core · 25 µm

Copper 1 oz (L4)

Coverlay · 25 µm

TOTAL ≈ 0.30–0.38 MMBEND: STATIC ≥ 20×T

Flex design rules that matter

The details that decide whether a flex survives assembly and field life:

· Use rolled-annealed (RA) copper across bends, not electrodeposited.
· Route traces perpendicular to the bend axis; stagger traces on opposite layers.
· No vias, pads or plane edges inside the bend region.
· Hatch (cross-hatch) planes in flex zones to keep them supple.
· Tear-stops and filleted corners at slits and outline transitions.
· Keep coverlay openings ≥ 0.2 mm away from conductor edges.

Rigid-flex stackup (6 L · 4 rigid + 2 flex)

The two flex layers run continuously through the whole board; rigid FR-4 caps laminate over them only in the rigid zones. No-flow prepreg keeps resin out of the bend window.

RIGID ZONE AFLEX ZONE · BENDRIGID ZONE B

L1 CU

FR-4 CORE

L2 CU

NO-FLOW PP

COVERLAY

L3 FLEX CU · 1 OZ RA — CONTINUOUS

POLYIMIDE CORE · 25–50 µm — CONTINUOUS

L4 FLEX CU · 1 OZ RA — CONTINUOUS

COVERLAY

NO-FLOW PP

L5 CU

FR-4 CORE

L6 CU

⌒ flex layers bend here — rigid caps stop ≥ 0.5–1.0 mm before the zone edge

· Place all components and plated vias in the rigid zones; the flex window carries traces only.
· Anchor the rigid-to-flex transition with coverlay extending 0.5–1.0 mm into the rigid area.
· For impedance in the flex zone, reference hatched planes and confirm Dk of the polyimide system (~3.4).
· Book-binder construction (progressively longer flex layers) eases multi-layer flex bends in thick builds.

Minimum bend radius calculator

Rule-of-thumb per IPC-2223: thinner flex and fewer layers bend tighter; dynamic flexing needs far larger radii than a one-time installation fold.

Flex thickness (mm)

Flex layers

Application

2.0 mmminimum inside bend radius

SEC 04

Controlled Impedance Calculator

IPC-2141 closed-form models for microstrip (outer layer) and stripline (inner layer) traces, single-ended and edge-coupled differential. Good to within a few percent for common geometries — final trace widths come from your fabricator’s field solver against measured material lots.

Impedance from geometry

All dimensions in mm. H is dielectric height to the reference plane (each side, for stripline).

Transmission line type

Trace width W

Dielectric height H

Copper thickness T

Dielectric constant Dk

Pair spacing S — differential modes only

—

Width for a target impedance

Solves the same models in reverse — a starting trace width for your stackup’s dielectric height.

Transmission line type

Target Z (Ω)

Dielectric height H (mm)

Copper thickness T (mm)

Dielectric constant Dk

—

SEC 05

Quick Engineering Tools

Copper weight converter

Copper foil weight in oz/ft² to physical thickness.

Copper weight (oz)

mm ↔ mil converter

Type into either field — the other follows.

Millimeters

Mils (thou)

1 mil = 0.0254 mm · 1 mm = 39.37 mil

Via aspect ratio check

Plated through-hole depth ÷ drill diameter.

Board thickness (mm)

Drill diameter (mm)

SEC 06

Stackup Materials Reference

The numbers behind every stackup decision: laminate systems by thermal and electrical class, prepreg glass styles with pressed thickness, and copper foil weights with practical etch limits.

Laminate systems

Material class	Tg (°C)	Dk @1 GHz	Df @1 GHz	Typical use
FR-4 Standard	130–140	4.4	0.020	Cost-driven consumer, ≤8 layers
FR-4 Mid-Tg	150	4.3	0.018	General industrial, lead-free assembly
FR-4 High-Tg	170–180	4.2	0.015	≥10 layers, thick boards, automotive
Halogen-free FR-4	150	4.3	0.016	Eco-compliant consumer electronics
High-speed low-Dk (Megtron-class)	185	3.7	0.004	10G+ SerDes, backplanes, switches
Rogers RO4350B	>280	3.48	0.0037	RF front-ends, antennas, radar
Polyimide (flex)	~250	3.4	0.008	Flex and rigid-flex cores

Prepreg glass styles

Glass style	Pressed thickness	Resin content	Notes
106	0.051 mm · 2.0 mil	~72%	Thinnest, resin-rich — fills heavy inner copper, fine-line impedance
1080	0.077 mm · 3.0 mil	~62%	Thin general-purpose ply, common under outer layers
3313	0.094 mm · 3.7 mil	~57%	Smooth weave — favorite for controlled impedance
2116	0.121 mm · 4.8 mil	~54%	The workhorse mid-thickness ply
7628	0.193 mm · 7.6 mil	~44%	Thick, lowest cost — bulk fill in standard builds

Copper foil weights

Weight	Thickness	Min trace/space (typ.)	Where it belongs
0.5 oz	17.5 µm · 0.69 mil	0.075 mm · 3 mil	Inner layers of high layer count boards, fine-pitch escape
1 oz	35 µm · 1.38 mil	0.100 mm · 4 mil	Default outer layer weight for most designs
2 oz	70 µm · 2.76 mil	0.200 mm · 8 mil	Power electronics, motor drives, high-current rails
3 oz	105 µm · 4.13 mil	0.300 mm · 12 mil	Heavy current bus structures — confirm prepreg fill with fab

SEC 07

Stackup Design Guidelines

RULE 01Reference every signal

Each routing layer needs an adjacent, unbroken plane. Return current flows directly under the trace — give it a path.

RULE 02Keep the stackup symmetric

Mirror copper weights and dielectric thicknesses about the board center, or the panel warps in reflow.

RULE 03Route adjacent signals orthogonally

In dual-stripline pairs, run one layer X and the other Y to keep broadside crosstalk in check.

RULE 04Couple power to ground tightly

A PWR/GND pair on ~0.1 mm dielectric adds distributed plane capacitance right where the bypass caps run out of steam.

RULE 05Keep outer prepreg thin

0.09–0.13 mm under L1 puts 50 Ω at a practical 0.13–0.18 mm trace and shrinks EMI loop area.

RULE 06Never cross plane splits

High-speed signals crossing a split reference plane radiate and ring. Reroute the trace or stitch the planes.

RULE 07Budget for plating

Outer copper grows ~20–25 µm in the plating bath. Impedance models must use finished, not foil, thickness.

RULE 08Specify targets, not constructions

Put impedance values and tolerances on the fab drawing; let the fabricator tune widths to their measured material lots.

RULE 09Plan vias with the stackup

Keep through-hole aspect ratio ≤ 8–10:1. Past 16 layers or under BGAs below 0.8 mm pitch, plan HDI / sequential lamination.

SEC 08

PCB Stackup FAQ

What is a PCB stackup?

A PCB stackup is the ordered arrangement of copper layers and insulating dielectric layers (cores and prepregs) that make up a printed circuit board. The stackup defines board thickness, which layers carry signals versus power and ground planes, and the dielectric spacing that sets controlled impedance, signal integrity and EMI behavior.

What is the standard 4 layer PCB stackup?

The most common 4 layer stackup on a 1.6 mm board is Signal / Ground / Power / Signal: roughly 0.2 mm of prepreg under each outer layer, a thick core of about 1.0 to 1.2 mm in the middle, and 1 oz copper throughout. Keeping the outer prepreg thin gives well-controlled impedance and tight coupling between outer signals and the internal planes.

What is the difference between core and prepreg?

A core is fully cured fiberglass laminate with copper foil already bonded on one or both sides, supplied at fixed thicknesses. Prepreg is uncured resin-impregnated glass cloth that melts and cures during lamination to glue cores and foils together. Prepreg comes in glass styles such as 106, 1080, 3313, 2116 and 7628, each with a characteristic pressed thickness.

What PCB thickness should I choose?

1.6 mm is the industry default and is the cheapest and most widely supported. Use 0.8–1.2 mm for compact or flexure-tolerant products, 2.0–3.2 mm for high layer counts, backplanes, heavy copper or mechanical stiffness. Connector and card-edge requirements (for example PCIe at 1.57 mm) often dictate the choice.

How do I choose copper weight (thickness)?

1 oz (35 µm) is the standard for outer layers and works for most digital designs. Use 0.5 oz (17.5 µm) on inner layers of high layer count boards to keep thickness down and etch fine traces. Use 2 oz (70 µm) or more for high-current power paths — roughly, a 1 mm wide 1 oz external trace carries about 2.5 A at a 10 °C rise.

Which stackup do I need for controlled impedance?

Every controlled-impedance signal layer needs an adjacent, unbroken reference plane. Choose dielectric heights that give practical trace widths: around 0.1 mm of prepreg under the outer layer yields roughly 50 Ω with a 0.13–0.18 mm microstrip trace on FR-4. Specify the impedance targets on your fab drawing and let the fabricator fine-tune widths to their measured materials.

What is a rigid-flex PCB stackup?

A rigid-flex stackup combines flexible polyimide layers that run continuously through the whole board with rigid FR-4 sections laminated on top and bottom in selected zones. The flex layers carry circuits across the bend region, protected by coverlay, while components mount on the rigid zones. No-flow prepreg bonds rigid to flex without resin bleeding into the bend area.

How many layers does my PCB need?

As a rule of thumb: 2 layers for simple low-speed boards, 4 layers once you need a solid ground plane or any controlled impedance, 6–8 layers for mixed-signal and DDR memory, 10–14 for dense FPGA or multi-rail designs, and 16–24 for switches, servers and backplanes. Add layers when routing density, supply rail count or signal integrity demands it — not before.

PCB Stackup recommendations, down to every core and prepreg.